Enhanced wafer level variability improvement by customized wafer dose patterning by shot in DRAM

As DRAM technology advances combined with more complex process steps than logic, cumulative effect of process variations leads to complicated shot-to-shot or die-to-die distribution in device electrical parameters. In this paper, ion implantation SuperScan by customized wafer dose patterning by shot is introduced to improve the shot-to-shot variability within zone in DRAM process. The wafer level throughput time of ion implantation gets no increase for mass production. The IDS uniformity improvement within zone is up to ∼40%, which then contributes to overall wafer level uniformity improvement (up to ∼30%). Wafer level yield improvement (up to ∼9%) has been verified, which is a major achievement for mass production.