(Invited) Fan-out Wafer-Level Packaging: Opportunities and Challenges Towards Heterogeneous Systems

Perceval Coudrain,Arnaud Garnier,Laetitia Castagné,Aurélia Plihon,Rémi Vélard,Rémi Franiatte,Jean-Charles Souriau, Jeanne Pignol, Célia Darrambide, Emmanuel Ollier

ECS Transactions（2022）

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摘要

This article describes opportunities and challenges towards heterogeneous systems integration by the so-called fan-out wafer-level packaging (FOWLP) technology. An introduction on the technology is given, before we describe specific developments built up at CEA-Leti. Recent assessments of a multi-chip SiP for 5G applications and scalable three-dimensional interconnects are presented.

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