Graphics Processing Unit Accelerated Small Delay Fault Simulator

Aiming at the small delay defect (SDD) simulation, a graphics processing unit (GPU) accelerated SDD simulator based on the critical path tracing method is proposed. The proposed method considers the re-convergent sensitizations and hazard-based detections, which provides fast and accurate simulation results for small delay defects. Different simulation strategies are employed for different faults. For fault-effects fan-out re-convergent stems, the forward serial simulation is applied. For the other faults, the method of backward critical path tracing is used to quickly judge the testability. Different from the previous methods, the proposed method no longer focuses on whether the stem has a re-convergent path, but on whether the fault effects actually re-converge, thus effectively reducing the time of serial fault simulation. In addition, according to the characteristics of the simulation method and the circuit structure, the multi-dimensional acceleration of GPU is developed, including gate level parallel, fault parallel, pattern parallel, which further effectively speeds up the simulation. Experimental results show that the proposed SDD simulator can further accelerate the efficiency of the fault simulation. Compared with the serial simulation method, it can achieve an average acceleration of 154.53 times, and compared with the traditional critical path tracing method, it can achieve an average acceleration of 22.9 times.