Fermi-Level Depinning in Metal/Ge Junctions by Inserting a Carbon Nanotube Layer

Germanium (Ge)-based devices are recognized as one of the most promising next-generation technologies for extending Moore's law. However, one of the critical issues is Fermi-level pinning (FLP) at the metal/n-Ge interface, and the resulting large contact resistance seriously degrades their performance. The insertion of a thin layer is one main technique for FLP modulation; however, the contact resistance is still limited by the remaining barrier height and the resistance induced by the insertion layer. In addition, the proposed depinning mechanisms are also controversial. Here, the authors report a wafer-scale carbon nanotube (CNT) insertion method to alleviate FLP. The inserted conductive film reduces the effective Schottky barrier height without inducing a large resistance, leading to ohmic contact and the smallest contact resistance between a metal and a lightly doped n-Ge. These devices also indicate that the metal-induced gap states mechanism is responsible for the pinning. Based on the proposed technology, a wafer-scale planar diode array is fabricated at room temperature without using the traditional ion-implantation and annealing technology, achieving an on-to-off current ratio of 4.59 x 10(4). This work provides a new way of FLP modulation that helps to improve device performance with new materials.