Electronic packaging for future electronic systems

semanticscholar(2021)

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摘要
uture electronic systems like autonomous systems using high-performance computing (HPC) and edge computing systems, sensor-integrated systems and biointegrated devices will require more and more functions that cannot be managed by a single chip, even if advanced system on chip (SoC) concepts are used. Heterogeneous integration will be the next step and will pass beyond current system in package (SiP) approaches. This concept of true heterogeneous integration is highly important for next-generation devices based on future CMOS-nodes, SiGe, SiC, III/Vs like GaAs or GaN, and all different kinds of microelectromechanical systems (MEMS). The digital transformation of society and economy creates an increasing demand to transfer, process and store vast amounts of data generated in the context of technologies such as autonomous driving, artificial intelligence (AI), and the Internet of Things (IoT). For conventional approaches, the amount of data to be stored is too big, the data transfer rates are too low, the available computational power is limiting, and the energy consumption, as well as the heat production of generalpurpose computer processing units (CPUs) in a von Neumann architecture, are too high. Therefore, complex calculations, simulations, and decision-making cannot be performed on a practical time scale. A paradigm shift is taking place in many applications, in that data is progressively processed at a more localized level – from the cloud to the edge and down to the sensor node, thereby enabling meaningful information to be extracted, transmitted, stored or acted upon faster. In the era of connected intelligence, fast information and decision-making are important and require effective concepts for low-power, secure, connected, and embedded computing. The new paradigm is systemic efficiency, characterized by multi-parametric optimization: reduction in power consumption, latency, and data transfer by means of preprocessed data and flexible processor architectures. Promising approaches are artificial neural networks and neuromorphic computing.
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