Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems（2021）
Key words
Metals,Stress,Integrated circuit interconnections,Atomic measurements,Voltage measurement,Degradation,System-on-chip,Diffusivity,electromigration (EM),failure,grain boundary (GB),mean-time-to-failure (MTTF),g grid,partial differential equation (PDE),stress,test chip,voiding
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