Analysis of the Interactions Between ILP and TLP With Hardware Transactional Memory

Víctor Nicolás-Conesa,Rubén Titos-Gil,Ricardo Fernández-Pascual,Alberto Ros,Manuel E. Acacio

2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)（2022）

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摘要

Hardware Transactional Memory (HTM) allows the use of transactions by programmers, making parallel programming easier and theoretically obtaining the performance of fine-grained locks. However, transactions can abort for a variety of reasons, resulting in the squash of speculatively executed instructions and the consequent loss in both performance and energy efficiency. Among the different sources...

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关键词

Out of order,Microarchitecture,Parallel programming,Pipelines,Parallel processing,Throughput,Hardware

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