A Framework for Calculating WCET Based on Execution Decision Diagrams
ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS(2022)
Abstract
Due to the dynamic behaviour of acceleration mechanisms such as caches and branch predictors, static Worst-case Execution Time (WCET) analysis methods tend to scale poorly to modern hardware architectures. As a result, a trade-off must be found between the duration and the precision of the analysis, leading to an overestimation of theWCET bounds. In turn, this reduces the schedulability and resource usage of the system. In this article, we present a newdata structure to speed up the analysis: the eXecution Decision Diagram (XDD), which is an ad hoc extension of Binary Decision Diagrams tailored for WCET analysis problems. We show how XDDs can be used to represent efficiently execution states in a modern hardware platform. Moreover, we propose a new process to build the Integer Linear Programming system of the Implicit Path Enumeration Technique using XDD. We use benchmark applications to demonstrate how the use of an XDD substantially increases the scalability of WCET analysis and the precision of the obtained WCET.
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Key words
Static WCET analysis,pipeline analysis,variable latencies,timing anomalies
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