7‐2: Invited Paper: A 40 nm Gate Length Surrounding Gate Vertical‐Channel FET Using Thermally Stable In‐Al‐Zn‐O Channel for 3D CMOS‐LSI Applications

SID Symposium Digest of Technical Papers(2021)

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摘要
We have developed a CMOS back‐end‐of‐line (BEOL) process compatible oxide semiconductor channel FET with newly proposed In‐Al‐Zn‐O (IAZO) for 3D CMOS‐LSI applications. Compared with In‐Ga‐Zn‐O for active‐matrix display applications, IAZO channel has higher thermal stability (~420°C) suitable for BEOL transistors where suppression of channel shortening is essential. We have successfully demonstrated a surrounding gate vertical‐channel FET with gate length of 40 nm by IAZO channel.
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cmos‐lsi
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