An 8-bit RRAM based Multiplier for Hybrid Memory Computing

2019 IEEE International Workshop on Future Computing (IWOFC(2019)

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摘要
Hybrid-memory computing can reconcile the speed of in-memory computing and the power of near-memory. An RRAM based multiplier for hybrid-memory computing is proposed to balance the efficiency and flexibility. It is implemented in standard RRAM model and 65nm CMOS technology. The simulation results show that the proposed RRAM based multiplier achieves a calculation speed of 1.6us and 1.32 mW from 1V power supply.
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关键词
in memory computing,near memory computing,multiplier,RRAM,hybrid
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