Designing Software Configurable Chips and SIPs using Chiplets and zGlue

Abstract zGlue Smart Fabric, an active silicon interposer, enables rapid development of Systems in Package (SiPs) and Chips using chiplet stacking in a modular style and software programmability. zGlue Smart Fabric works with off-the-shelf chiplets in known good die and wafer level chip scale packages format without dictating a footprint constraint on chiplets. This is achieved by making a fine pitch copper pillar micro-bump array on the surface that can conform to the chiplet ball map using a programable connectivity and power array built into zGlue's fabric. Connection to RF and sensitive analog signals are handled in RDL. Programmability of zGlue bumps also enable some repair and reconfigurability after manufacturing. The design process with zGlue includes usage of a cloud-based software design tool called ChipBuilder. This tool performs most conventional SiP design functions but more importantly it is used for creating soft and hard routes among IOs. ChipBuilder starts with a data representation of zGlue's Smart Fabric. A growing library of chiplet data has been encoded into the tool and is made available to the users of ChipBuilder via the cloud. Users select chiplets, enter design, perform IO planning, and route the design. With this modular IC design style, zGlue can handle high mix devices that are expected with the growth of connected smart devices everywhere.