A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic

IEEE Transactions on Circuits and Systems I: Regular Papers(2022)

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摘要
In-memory computing using emerging technologies such as resistive random-access memory (ReRAM) addresses the ‘von Neumann bottleneck’ and strengthens the present research impetus to overcome the memory wall. While many methods have been recently proposed to implement Boolean logic in memory, the latency of arithmetic circuits (adders and consequently multipliers) implemented as a sequence of such ...
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关键词
Logic gates,Adders,Computer architecture,Microprocessors,Arrays,Logic arrays,Parallel processing
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