A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleavingP. Madoglio,A. Ravi, L. Cuellar,S. Pellerano,P. Seddighrad,I. Lomeli,Y. Palaskas2009 Proceedings of ESSCIRC（2009）引用 0|浏览0暂无评分AI 理解论文溯源树样例生成溯源树，研究论文发展脉络Chat Paper正在生成论文摘要
