Particularities of Sync Monitoring in FPGA Components of Safety-Related Systems

Two approaches to monitoring synchronization in FPGA components of safety-related systems are compared: logical and power-oriented. Logical on-line testing detects errors in the results of calculations and operates within the logical checkability of the circuit, i.e. when a fault manifests itself as an error. The power-oriented monitoring of synchronization reacts to disruptions in case of a significant change in the circuit's energy parameter, or equivalently its current consumption. Power-oriented checkability determines the possibilities of such monitoring in the area located below the consumption current with zero activity of information signals. The synchronization monitoring responses follow from the features of safety-related systems, which are designed to operate in two modes: normal and emergency. As a rule, in normal mode, information signals change slightly, often at the noise level. This reduces the logical checkability of the circuits and brings the current consumption closer to the level of zero activity of information signals, significantly increasing the power-oriented checkability. Experiments are carried out comparing the efficiency of logical and power-oriented synchronization monitoring in FPGA components of safety-related systems in conditions of reduced activity of information signals.