Improving Phased Transactional Memory via Commit Throughput and Capacity Estimation

2021 IEEE 33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)(2021)

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摘要
Transactional Memory (TM) is a programming abstraction that aims to ease parallel programming in shared-memory architectures. Both Hardware (HTM) and Software Transactional Memory (STM) implementations have been extensively studied in the literature. Modern approaches seek to combine both HTM and STM to better exploit performance. In particular, Phased TMs (PhTMs) systems execute transactions in p...
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关键词
Hardware Transactional Memory,Software Transactional Memory,shared memory
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