A Second-order DWA Algorithm for Multi-bit ΔΣADC/DAC

This paper proposes a 2-order data-weighted averaging (DWA) algorithm for multi-bit low-pass ΔΣADC/DAC, which is one of dynamic element matching (DEM) algorithms. Oversampling and noise-shaping are used to achieve high linearity of ΔΣADC/DAC, and they are attractive as sensor interface circuits for Internet-of-Things (IoT) applications. However, when a multi-bit DAC is used inside their circuits, its nonlinearities are not noise-shaped and the overall linearity of the ΔΣADC/DAC degrades. To overcome this problem, several algorithms to noise-shape the DAC nonlinearities have been proposed; many of them perform the first-order noise-shaping. In this paper we investigate a second-order noise-shaping algorithm, which is more effective than the first-order one and easy to implement compared to conventional second-order ones, though it needs two-cycle operation which makes the circuit to be slow. Our MATLAB simulation shows the effectiveness of the algorithm, and also we show its switched capacitor circuit implementation.