A compact 128/192/256-bits symmetric cryptography hardware module

This article describes the implementation of Twofish one of the Advanced Encryption Standard (AES) finalists, in Field Programmable Gate Array FPGA. The core was implemented in Altera Quartus Cyclone board. The code is totally portable and can be used in any FPGA. The algorithm was implemented for 128-bit word and 128, 192 and 256-bit keys. The main goal of this work was the implementation of an efficient, compact and modular Twofish hardware module that can find a wide range of applications as an alternative from AES-Rijndael.