A 24-Gb/s/Pin 8-Gb GDDR6 With a Half-Rate Daisy-Chain-Based Clocking Architecture and I/O Circuitry for Low-Noise Operation

IEEE Journal of Solid-State Circuits(2022)

引用 8|浏览15
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摘要
The demand for high-performance graphics systems used for artificial intelligence, cloud game, and virtual reality continues to grow; this trend requires graphics systems to achieve ever higher bandwidths. This article proposes a GDDR6 dynamic random access memory (DRAM) with a half-rate clocking architecture and optimized receiver and transmitter to improve high-speed operation. Furthermore, this...
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关键词
Clocks,Random access memory,Transmitters,Receivers,Graphics,Bandwidth,Multiplexing
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