A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer

2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)(2022)

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摘要
In this article, we propose a duobinary transceiver for graphics double-data-rate (GDDR) memory interfaces. The proposed voltage-mode driver complies with the GDDR impedance specifications without sacrificing the ratio of level mismatch (RLM). The quarter-rate time-interleaved successive approximation duobinary receiver (Rx) reduces the forwarded clock frequency and minimizes the capacitive loading of the front-end analog equalizer (EQ). To compensate for the channel loss, the transmitter is composed of a three-tap feed-forward EQ, and the Rx employs a continuous-time linear EQ. Also, an EQ adaptation scheme applicable to duobinary signaling is proposed. The transceiver achieves a 10-(2) bit error rate at 21 Gb/s with 1.42 mW/Gb.
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关键词
Adaptive equalizer (EQ),duobinary,feed-forward equalizer (FFE),graphics double-data-rate (GDDR),high-speed interface,time-interleaving
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