A Hybrid Continuous Time Incremental and SAR Two-Step ADC with 90.5dB DR over 1MHz BW

Yanchao Wang,Siladitya Dey,Tao He,Lukang Shi,Jiawei Zheng,Manjunath Kareppagoudr,Yi Zhang,Kazuki Sobue,Koichi Hamashita,Koji Tomioka,Gabor Temes

2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)（2021）

引用 8|浏览7

暂无评分

摘要

The sensors in real-time data processing IoT devices require high resolution and sub-MHz data converters. They are often implemented as Incremental ADCs (IADCs) [1], [2] because of their efficient oversampling technique and low latency. In discrete-time incremental ADCs (DT-IADC) [2], the nonlinearity and charge injection of the sampling switch degrades the performance, and power hungry opamps are...

查看译文

关键词

Performance evaluation,Power demand,Switches,Data processing,Switched capacitor circuits,Real-time systems,Solid state circuits

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要