High-Performance CMOS Latch Designs for Recovering All Single and Double Node Upsets

IEEE Transactions on Aerospace and Electronic Systems(2021)

引用 11|浏览5
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摘要
Latches areused extensivelyin digital circuits; however, as technology scaling reaches nanometric feature sizes, externally induced phenomena (such as radiation strikes in aerospace applications) may cause a single event upset (SEU) in either single or double nodes. Rather than masking, mitigation of an SEU is effectively achieved by recovering the correct value throughthe design of hardened latch...
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关键词
Latches,Radiation hardening (electronics),Redundancy,Hardware,Single event upsets,Power dissipation,Feedback loop
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