A 0.6-V 400-KS/s Low Noise Asynchronous SAR ADC With Dual-Domain Comparison

2021 18th International SoC Design Conference (ISOCC)（2021）

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摘要

This paper presents a low noise 0.6-V 400-KS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) with time domain comparator. The VCDL-based time domain comparator suppresses noise at low voltages but requires significant conversion time. Therefore, the sampling rate of the low voltage SAR ADC is increased by using a double-tail comparator and asynchronous logi...

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关键词

Low voltage,Voltage,Delay lines,Distortion,CMOS technology,Registers,Time-domain analysis

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