Hign-Speed Data Sample Circuit Based On Cpld Technology And Its Application In Flowmeter

Jg Wang,Yh Wang, Y Fan, Hj Ma

ICEMI'2003: PROCEEDINGS OF THE SIXTH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS, VOLS 1-3(2003)

Cited 0|Views0
No score
Abstract
The measurement principle and hardware structure of a new-style time difference method ultrasonic flowmeter of software arithmetic based on CPLD high-speed data sampling technology are simply presented. High-speed complex programmable logic device CPLD is adopted in the data sample circuit. High-speed dual-port RAM, control sample time sequence logic, CPU interface and bus circuit are designed in CPLD, sample speed is up to 80MHz and sample depth is 1K byte, it can fulfill the requirement of ultrasonic flowmeter software arithmetic to sampling. The design can upgrade on-line. Thus, system's whole performance is improved.
More
Translated text
Key words
CPLD, microprocessor, high-speed data sample, ultrasonic flowmeter, software time difference arithmetic
AI Read Science
Must-Reading Tree
Example
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined