A parallel hardware hypervisor for hardware-accelerated cloud computing

Hardware-accelerated cloud computing systems based on FPGA or ASIC chips have proved useful in providing power-efficient acceleration for a variety of software applications. However, these computing systems rely on operating systems and hypervisors, which not only are implemented with inefficient software, but which also are incapable of handling massively parallel systems, due to the lack of parallelism and scalability in their algorithmic designs. As a result, power, performance, and scalability problems will emerge in an exascale cloud computing environment. As a solution to these problems, the present study proposes a parallel hardware hypervisor system implemented entirely in special-purpose hardware without resorting to energy-inefficient general-purpose processors. Furthermore, the proposed hypervisor system virtualizes application-specific multi-chip supercomputers, in order to enable the virtual supercomputers to share available FPGA and semi-configurable ASIC resources in a cloud system. Single-chip verification studies based on Verilog simulation have been done to verify the functional correctness of the proposed hardware hypervisor system, which consumes only a fraction of hardware resources. This article will in particular focus on the virtualization of multi-chip message-passing based supercomputers using limited reconfigurable hardware resources.