Single Event Analysis On Sram 180nm Cmos Memory With Super Voter Protection Technique

2021 IEEE AEROSPACE CONFERENCE (AEROCONF 2021)(2021)

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摘要
This work presents excellent results from measuring Single Event Effect (SEE) on SRAM memory devices fabricated on 180nm CMOS technology with a Super Voter Protection Technique.The Super Voter consists of concepts from conventional Hamming encoding and Triple Modular Redundancy (TMR). Robustness was increased using data frame separation between Most Significant Bit (MSB) and Least Significant Bit (LSB) on some error correction stages and the final output restored joining again the two parts, keeping their error flags apart, to increase performance. This novel design provides an error signaling logic called DOUBLE ERROR LSB and DOUBLE ERROR MSB to detect double errors.In Space, there are many natural phenomena such as SEE, a radiation-induced disturbance that causes unwanted behavior in the logic of Integrated Circuits (IC). Therefore, the use of techniques that mitigate these effects are widely studied in space applications.We ran tests to compare three architectures: a) without protection, b) using only hamming code and c) using Super Voter. The results indicate that the Super Voter can be heavily adopted in aerospace applications.
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关键词
most significant bit,TMR,SEE,integrated circuits,double error LSB,double error MSB,Hamming encoding,error signaling logic,error flags,error correction stages,Least Significant Bit,data frame separation,Triple Modular Redundancy,SRAM memory devices,single event effect,Super Voter Protection Technique,CMOS memory,Single Event analysis,size 180.0 nm
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