Interdigitated Ldmos

Jaejune Jang, Kyu-Heon Cho, Dongeun Jang,Minhwan Kim,Changjoon Yoon,Junsung Park, Hyunsil Oh, Chiho Kim,Hyoungsoo Ko,Keunho Lee,Sangbae Yi

2013 25TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD)（2013）

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Abstract

Novel Interdigitated LDMOS is experimented resulting in best in class R-SP-BVDSS performance (21.8m Omega-mm(2) with BVDSS of 47V) in comparison to published LDMOS. RSP improvement is made through additional current path by removing STI region in drift area. Breakdown voltage is maintained with lateral field plate effect from side of the current path. Proposed Interdigitated LDMOS satisfies reliability criteria (HCI, snap back) as 40V device. All of this is obtained without any process change.

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Key words

MOS integrated circuits,electric breakdown,integrated circuit reliability,HCI,RSP-BVDSS performance,STI region removal,breakdown voltage,interdigitated LDMOS,lateral field plate effect,reliability,voltage 40 V,voltage 47 V,

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