A Novel Capacitor-Based Stateful Logic Operation Scheme For In-Memory Computing In 1t1r Rram Array

For the first time, a novel capacitor-based (cap-based) stateful logic operation scheme for in-memory computing is proposed and experimentally demonstrated in a 1k-bit 1T1R RRAM array. By utilizing the interconnect capacitor of the array, the cap-based scheme does not need series resistors compared with conventional operation scheme. Therefore, the circuit overhead caused by series resistor can be removed. Based on the cap-based scheme, the NAND gate is experimentally demonstrated. Additionally, the parallel logic operation is implemented in the RRAM array. The operation principle and the effect of interconnect wire capacitance on logic operations are discussed comprehensively. This work presents a simple and feasible approach for RRAM-based in-memory computing.