Design of 3-bit current mode flash ADC using WTA based current comparator

2017 2ND INTERNATIONAL CONFERENCE ON TELECOMMUNICATION AND NETWORKS (TEL-NET)(2017)

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摘要
This paper presents a novel Winner-Take-All (WTA) based current comparator circuit. The proposed comparator employs gain-boosted regulated-cascode CMOS stages at the input node, which offers a very high precision for most of the current mode sensing applications. An application of the proposed comparator as a 3-bit current mode Flash Analog to Digital Converter (ADC) has also been presented in the paper. The theoretical concept of the current comparator and its application as a current mode Flash ADC has also been verified by simulations in Pspice using 0.18um TSMC CMOS technology and a supply voltage of 1.8V.
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关键词
Current Mode,Winner-Take-All,Current Comparator,ADC
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