Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options

2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC)(2021)

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摘要
In this paper, we present three commercial-grade 3D IC designs based on state-of-the-art design technologies, specifically micro-bumping (3D die stacking), hybrid bonding (wafer-on-wafer bonding) and monolithic 3D IC (M3D). To highlight trade-offs present in these three designs, we perform analyses on power, performance, and area and the clock tree. We also model the tier-to-tier interconnection in each 3D IC methodology and analyze signal integrity to assess the reliability of each design. From our experiments, hybrid bonding design shows the best timing improvement of 81.4% when compared to its 2D counterpart, while micro-bumping shows the best reliability among 3D IC designs.
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关键词
microbumping,monolithic 3D IC,PPA study,heterogeneous 3D IC options,commercial-grade 3D IC designs,tier-to-tier interconnection,3D IC methodology,hybrid bonding design,3D die stacking,wafer-on-wafer bonding,M3D
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