CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics

2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC)(2021)

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摘要
Sparse matrix-vector multiplication (SpMV) is a critical building block for iterative graph analytics algorithms. Typically, such algorithms have a varying active vertex set across iterations. This variability has been used to improve performance by either dynamically switching algorithms between iterations (software) or designing custom accelerators (hardware) for graph analytics algorithms. In this work, we propose a novel framework, CoSPARSE, that employs hardware and software reconfiguration as a synergistic solution to accelerate SpMV-based graph analytics algorithms. Building on previously proposed general-purpose reconfigurable hardware, we implement CoSPARSE as a software layer, abstracting the hardware as a specialized SpMV accelerator. CoSPARSE dynamically selects software and hardware configurations for each iteration and achieves a maximum speedup of 2.0x compared to the naive implementation with no reconfiguration. Across a suite of graph algorithms, CoSPARSE outperforms a state-of-the-art shared memory framework, Ligra, on a Xeon CPU with up to 3.51 x better performance and 877 x better energy efficiency.
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关键词
sparse matrix-vector multiplication,critical building block,iterative graph analytics algorithms,varying active vertex,iteration,software reconfiguration,SpMV-based graph analytics algorithms,general-purpose reconfigurable hardware,software layer,specialized SpMV accelerator,CoSPARSE dynamically,graph algorithms,state-of-the-art shared memory framework
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