1-trit Ternary Multiplier and Adder Designs Using Ternary Multiplexers and Unary Operators

This work proposes models for a L-trit TMUL (Ternary Multiplier) and THA (Half-Adder) using TMUXs (Ternary Multiplexers) and unary operators. The target of the proposed designs is to minimize energy consumption in nanoscale embedded circuits to improve their battery usage. To achieve that, different techniques are used: 32-nm CNTFET tranisistor, Multiple-Valued Logic (MVL), two voltage supplies 更多