A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area

Peter Deaville,Bonan Zhang,Lung-Yen Chen,Naveen Verma

ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)（2021）

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摘要

This paper presents the first MRAM-based In-Memory-Computing (IMC) macro, implemented as a 128-kb array in an advanced-node 22nm FD-SOI technology. The design maximizes IMC row parallelism for energy efficiency and throughput, while addressing the critical challenges this raises, namely: high column currents; high output dynamic-range requirements; and large area of peripheral readout circuits. Th...

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关键词

Training,Resistance,Sensitivity,Stochastic processes,Switches,Parallel processing,Throughput

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