Avalanche Transient Simulations of SPAD integrated in 28nm FD-SOI CMOS Technology

D. Issartel,S. Gao,S. Hagen,P. Pittet,R. Cellier,D. Golanski,A. Cathelin,F. Calmon

2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS)（2021）

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摘要

This article presents a study of Single Photon Avalanche Diodes (SPAD) implemented in 28nm Fully Depleted Silicon-On-Insulator (FD-SOI) CMOS technology based on transient TCAD simulations. The integration of SPAD in this technology is currently being studied. This work allows for a better understanding of the mechanism behind the quite high Dark Count Rate (DCR) measured at relative low excess bia...

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关键词

Semiconductor device modeling,Fabrication,Voltage measurement,Conferences,Silicon-on-insulator,CMOS technology,Silicon

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