A Sub-THz Frequency Doubler with Quadrature Outputs in 40-nm CMOS
2021 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)(2021)
Abstract
A sub-THz frequency doubler with quadrature outputs is demonstrated in a 40-nm CMOS technology. The proposed scheme facilitates a local frequency generator operating near the maximum oscillation frequency of the technology. An impedance transformation network provides high impedance at the 2nd harmonic frequency, rejects the desired signal from feeding back and enhances the fundamental rejection ratio (FRR). The quadrature outputs can be adopted in quadrature phase modulation transceivers. The proposed doubler shows a conversion gain of -113 dB and -123 dB at the quadrature outputs, with a frequency range from 170 GHz to 184 GHz. The maximum output power is -8 dBm. The FRR better than 40 dB guarantees the output signal quality.
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Key words
CMOS,sub-THz,frequency doubler,local oscillator,quadrature phase
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