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Opportunities and challenges brought by 3D-sequential integration

P. Batude,L. Brunet,C. Fenouillet-Beranger,D. Lattard,F. Andrieu,M. Vinet,L. Brevard,M. Ribotta,B. Previtali,C. Tabone,F. Ponthenier,N. Rambal,P. Sideris,X. Garros,M. Casse,C. Theodorou,B. Sklenard,J. Lacord,P. Besson,F. Fournel,S. Kerdiles,P. Acosta-Alba,V Mazzocchi,J-M Hartmann,F. Mazen,S. Thuries,O. Billoint,P. Vivet,G. Sicard,G. Cibrario,M. Mouhdach,B. Giraud, C. M. Ribotta,V Lapras

IITC2021: 2021 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE (IITC)（2021）

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Abstract
The aim of this paper is to present the 3D-sequential integration and its main prospective application sectors. The presentation will also give a synoptic view of all the key enabling process steps required to build high performance Si CMOS integrated by 3D-sequential with thermal budget preserving the integrity of active devices and interconnects and will sketch a status and prospect on current low temperature device performance.
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Key words
3D sequential integration,3D monolithic integration,Low temperature process,FDSOI,Low-K spacer,Raised Source Drain,iBEOL reliability
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