An Efficient Hardware Architecture for Sparse Convolution using Linear Feedback Shift Registers
2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP)(2021)
摘要
Deep convolutional neural networks (CNNs) have shown remarkable success in many computer vision tasks. However, their intensive storage, bandwidth and computational requirements limit their deployment to embedded platforms. Although several research efforts have shown that pruning redundant weights could significantly reduce storage and computations, working with sparse weights remains challenging...
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关键词
Tensors,Convolution,Linear feedback shift registers,Hardware,Inference algorithms,Real-time systems,System-on-chip
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