A 650 pW, −71 dB PSRR, 205°C Temperature Range Hybrid Voltage Reference with Curvature-Based Temperature Compensation and SBFL Techniques

2021 Symposium on VLSI Circuits（2021）

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摘要

This paper presents a 650 pW 1V hybrid voltage reference with curvature-based temperature compensation in a 0.18-μm CMOS process. The design achieves a 45 ppm/°C from −55 to 150 °C, line sensitivity of 0.016 %/V and PSRR of −71 dB at 100 Hz by employing a self-biasing feedback loop.

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关键词

PSRR,hybrid voltage reference,curvature-based temperature compensation,SBFL techniques,CMOS process,line sensitivity,self-biasing feedback loop,frequency 100.0 Hz,temperature -55.0 degC to 150.0 degC,temperature 205.0 degC,power 650.0 pW,voltage 1.0 V,size 0.18 mum

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