Transparent Resilience For Approximate Dram

ARCHITECTURE OF COMPUTING SYSTEMS (ARCS 2021)(2021)

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Abstract
Approximate DRAM can reduce energy consumption by exposing application data to probabilistic errors. However, not all data is amenable to approximation, and errors in certain critical data can lead to invalid outputs or application crashes. Identification of critical data typically requires annotations in source code. Transparent protection mechanisms attempt to automatically protect applications from critical data errors without programmer intervention. This work proposes and compares alternatives to transparent data protection for approximate DRAM. We alleviate the impact of errors on application quality by triggering approximate re-executions when invalid outputs are detected. Furthermore, we evaluate transparent hardware and software-level resilience mechanisms for approximate memory that can avoid a large fraction of critical errors. Our results show that adding resilience mechanisms to approximate DRAM reduces crashes and invalid outputs when compared to non-resilient approximate DRAM (up to 3x), and saves energy when compared to standard DRAM (14-31%).
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Key words
Approximate computing, Approximate DRAM, Error tolerance, Interfaces for approximate data
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