Interconnect-Centric Benchmarking of In-Memory Acceleration for DNNS

In-memory computing (IMC) provides a dense and parallel structure for high performance and energy-efficient acceleration of deep neural networks (DNNs). The increased computational density of IMC architectures results in increased on -chip communication costs, stressing the interconnect fabric. In this work, we develop a novel performance benchmark tool for IMC architectures that incorporates devi...