ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications

2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)(2021)

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摘要
This work presents a current-mode readout frontend for a 128 × 64 array of ISFETs integrated in 180 nm 1P6M CMOS technology. The most relevant ISFET systems have not been implemented using single device configurations, instead, ISFETs in an array configuration has been used. The proposed front-end architecture linearly digitizes the output current of the ISFET array through a current conveyor, a t...
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关键词
Semiconductor device modeling,Semiconductor device measurement,Linearity,Prototypes,CMOS technology,Lab-on-a-chip,Foundries
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