A Low Noise Cmos Instrumentation Amplifier For Tmr-Effect-Based Magnetic Sensors

This paper presents a low 1/f noise CMOS single-ended output instrumentation amplifier (IA) for tunneling magnetic resistance (TMR) sensors. For high DC gain and linearity, the amplifier employs three-stage current-feedback topology. For high CMRR and PSRR, the first two stages employ fully differential input. To maintain stability and lower the power dissipation, the amplifier employs trans-conductance with capacitance feedback compensation (TCFC) topology. The amplifier employs chopping technology and continuous-time AC-coupled ripple reduction loop to reduce 1/f noise and chopping ripple. The whole chip is fabricated using 0.35 mu m CMOS-BCD technology and the total area is 1 mm(2). Test result shows an input-referred noise power spectral density (PSD) of 14 nV/Hz is achieved with 1 Hz 1/f corner. The bandwidth is larger than 50 kHz (65 xmagnification) with 20 pF load capacitor. The total current is 300 mu A at 5 V supply.