Epitaxial Al-InAs Heterostructures as Platform for Josephson Junction Field-Effect Transistor Logic Devices
IEEE Transactions on Electron Devices(2021)
Abstract
We fabricate Josephson junction field-effect transistors (JJ-FETs) using InAs quantum well heterostructure as the channel, epitaxial Al as superconducting electrodes, and scaled-down Al
2
O
3
gate dielectrics. A systematic investigation of the gate voltage (V
G
) dependence of the critical current, normal state conductance, and characteristic voltage of the JJ-FETs coupled with capacitance measurements reveals different V
G
regimes in the proximity effect characterization of JJ-FETs. Self-consistent Poisson-Schrödinger simulations allow us to associate these V
G
regimes with the carriers populating one or more subbands at different vertical locations in the heterostructure. We also discuss the importance of oxide/channel interface quality and its impact on the practical implementation of JJ-FET Boolean logic gates with signal restoration.
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Key words
III–V quantum well,InAs,Josephson junction field-effect transistor (JJ-FET),self-consistent Poisson–Schrödinger simulation
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