A defect characterization technique for the sidewall surface of Nano-ridge and Nanowire based Logic and RF technologies

2021 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)(2021)

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摘要
We introduce a set of new characterization techniques for the direct defect analysis of the sidewall surfaces of Nano-ridge, Nanowire, and FinFET based devices, being used in current (and future) logic and RF technologies. We demonstrate the application of these techniques on GaAs mesa, Nano-ridge, and InGaAs nano-wire based PIN diodes where surface defect densities are difficult to extract currently. We show that a close match in extracted density, with both measured data and calibrated TCAD simulations of above device types, is achieved validating the applicability of the techniques.
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关键词
III-V, III-V defects, Nano-wire sidewall defects, Nano-ridge devices, Hetero-junction Bipolar transistor
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