Low-Power Retentive True Single-Phase-Clocked Flip-Flop With Redundant-Precharge-Free Operation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2021)
摘要
As basic components, optimizing power consumption of flip-flops (FFs) can significantly reduce the power of digital systems. In this article, an energy-efficient retentive true-single-phase-clocked (TSPC) FF is proposed. With the employment of input-aware precharge scheme, the proposed TSPC FF precharges only when necessary. In addition, floating node analysis and transistor level optimization are...
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关键词
Transistors,Power demand,Discharges (electric),Digital systems,Robustness,Low voltage,Clocks
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