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Optimized programming algorithms for multilevel RRAM in hardware neural networks

2021 IEEE International Reliability Physics Symposium (IRPS)(2021)

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Abstract
A key requirement for RRAM in neural network accelerators with a large number of synaptic parameters is the multilevel programming. This is hindered by resistance imprecision due to cycle-to-cycle and device-to-device variations. Here, we compare two multilevel programming algorithms to minimize resistance variations in a 4-kbit array of HfO2 RRAM. We show that gate-based algorithms have the highe...
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Key words
Resistance,Training,Neural networks,Software algorithms,Random access memory,Programming,Software
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