Minimization of Switching Activity of Graphene Based Circuits
2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID)(2021)
Abstract
Reduction of power dissipation is a key challenge of VLSI circuits designers. In traditional CMOS-based circuits, dynamic power dissipation occurs due to the switching activity, i.e., transitions at logic nodes. In graphene-based circuits, power dissipation is also caused by the switching activity. In this paper, we compute the switching activity of these circuits considering the switching at ever...
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Key words
Logic circuits,Graphene,Switches,Very large scale integration,Logic gates,Minimization,Logic functions
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