FlexiPair: An Automated Programmable Framework for Pairing Cryptosystems

Pairing cryptosystems are extremely powerful mathematical tools for developing cryptographic protocols that can provide end-to-end security for applications like Internet-of-Things (IoT), cloud services and cyber-physical systems (CPS). However, these applications require the implementations to be light-weight but still real-time, with the additional feature of being flexible. The flexibility can come from different choices of underlying algorithms along with suitable parameter choices. A software implementation offers better flexibility but lacks in timing performance, whereas custom hardware delivers better performance but has poor flexibility. Furthermore, the designs over small characteristic curves are now insecure against recent attacks. Existing designs do not address the drawback of less flexibility and huge resource consumption collectively. In this article, we present a micro-program controlled hardware design which has the least resource consumption among the similar existing designs on FPGA that offer such programmability and flexibility. This redundant number arithmetic-based architecture consumes only 2506 slices on Xilinx Virtex-7 FPGA. It can be migrated to other device families or updated for different algorithms without data-path or control-path modification. To enhance the flexibility, we developed a custom assembly-like finite state machine (FSM) description, called Prism, and necessary tool to generate the micro-program states. To illustrate the functionality of Prism, we present designs for Tate and Optimal-Ate pairing with the micro-program states generated using this tool.