Design For Amoled Source Driver Output Buffer With Dac Function

To meet the requirements of small area, high precision and low power consumption of AMOLED driver chip, a high performance output buffer with DAC function is designed. This buffer adopts rail to rail input stage and Class AB output stage to adapt to a large input and output voltage range, and uses Cascode Miller compensation to reduce the size of the compensation capacitor. Its tail current source is programmable to implement 4 bit DAC function interpolation, saving overall power consumption and chip area. Under the UMC80 nm CMOS process, the simulation results show that in the input voltage range of 0.2 similar to 6.3 V, the DC gain of the buffer is greater than 70 dB, the phase margin is greater than 60 degrees, the quiescent current can be as low as 0.5 mu A, and the settling time as low as 1.49 mu s. With a typical medium voltage of 3.3 V, the DC gain can reach 129 dB, the phase margin is 75 degrees, the gain bandwidth is 9.4 MHz, and the quiescent current is 1.3 mu A. After 4 bit interpolation of the 60 mV input voltage, the output error is less than 0.255 mV. The designed buffer has high accuracy, fast settling time, and low power consumption. The output buffer realizes the role of the second-stage DAC, which meets the application requirements of AMOLED source driving.