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基于链路口的TS201与FPGA互联设计

Journal of Information Engineering University(2016)

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Abstract
介绍了一种TS201与FPGA通过高速链路口互联的方法,重点阐述了FPGA端收发模块的设计方案.该方案利用多级转换与状态机对模块结构进行了优化,并采用同步时钟与静态缓存有效解决了接收模块端链路时钟不连续的问题.仿真结果验证表明,设计的FPGA端收发模块,能实现符合链路口通信协议的数据传输.
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