Parallel Monitoring Architecture for 100 Gbps and Beyond Optical Ethernet
2021 International Conference on Information Networking (ICOIN)(2021)
Abstract
In this study, we propose an architecture for monitoring packets coming from a high-speed optical Ethernet network. Moreover, we implement a packet monitoring system adopting our proposed architecture using general PC-based equipment with a field-programmable gate array (FPGA)based network interface card (NIC). We also experimentally achieve a full line-rate processing capability for 100-Gbps Ethernet and examine its feasibility on 400-Gbps Ethernet.
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Key words
Ethernet,Monitoring,AWG,FPGA
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